密码芯片的多算法随机作业流调度方法

doi:10.11959/j.issn.1000-436x.2016275

通信学报 ›› 2016, Vol. 37 ›› Issue (12): 86-94.doi: 10.11959/j.issn.1000-436x.2016275

密码芯片的多算法随机作业流调度方法

李莉^1,²,史国振³,耿魁⁴,董秀则²,王璇¹,李凤华⁴()

¹ 西安电子科技大学通信工程学院，陕西西安 710071
² 北京电子科技学院电子信息工程系，北京 100070
³ 北京电子科技学院信息安全系，北京 100070
⁴ 中国科学院信息工程研究所信息安全国家重点实验室，北京 100093

出版日期:2016-12-25 发布日期:2017-05-15
基金资助:
国家重点研发计划基金资助项目;北京市自然科学基金资助项目;版重大科技工程基金资助项目

Stochastic job stream scheduling method for cipher chip with multi-cryptography

Li LI^1,²,Guo-zhen SHI³,Kui GENG⁴,Xiu-ze DONG²,Xuan WANG¹,Feng-hua LI⁴()

¹ College of Communication Engineering, Xidian University, Xi'an 710071, China
² Department of Electronic and Information Engineering, Beijing Electronics Science and Technology Institute, Beijing 100070,China
³ Department of Information Security, Beijing Electronic Science and Technology Institute, Beijing 100070, China
⁴ State Key Laboratory of Information Security, Institute of Information Engineering, CAS, Beijing 100093, China

Online:2016-12-25 Published:2017-05-15
Supported by:
The National Key Research and Development Project;The Natural Science Foundation of Beijing;The Major Science and Technology Project of Press and Publication

摘要/Abstract

摘要：

针对安全领域中海量业务安全需求多样性导致的多种密码算法运算随机交叉的现象，提出了具有关联判断控制的基于业务标识的分层硬件调度方法(HHS-ACDID)。第一级调度完成业务在不同算法簇上的分配，通过优化检索逻辑，实现数据的快速分配；第二级调度通过增设关联控制模块和关联队列的方式，完成上下文相关作业分组调度顺序的处理。采用中间状态存储模块，以业务号为索引完成串行密码算法工作模式下中间状态的存储，并通过预处理模块完成对后序关联作业分组输入数据的处理。实验验证所提调度方法有效解决了高速数据流下多对多通信中多密码算法、多数据流的随机交叉加解密问题。

关键词: 交叉加解密, 作业调度, 多算法, 密码处理芯片, 硬件调度

Abstract:

Aiming at the rich of safety requirements of tasks which resulting in random cross access to multi cipher algorithms, a hierarchical hardware scheduling method was presented with associated control based on data identifica-tion. The first level was responsible for distributing tasks to different cipher clusters, and by optimizing the search logic to achieve rapid distribution of data. The second level was responsible for completing the context-related tasks in scheduling order by adding an association control module and association queues. Intermediate state storage module realized the saving of the intermediate state in serial cipher algorithm modes, which was indexed by task ID. Pre-processing module process data inputted by the succeeding tasks. It is proved that the proposed scheduling algo-rithm solves the problem of random cross encryption and decryption in many-to-many communication model of high-speed data stream.

Key words: cross encryption and decryption, job stream scheduling, multi-cryptography, cipher chip, hardware scheduling

李莉,史国振,耿魁,董秀则,王璇,李凤华. 密码芯片的多算法随机作业流调度方法[J]. 通信学报, 2016, 37(12): 86-94.

Li LI,Guo-zhen SHI,Kui GENG,Xiu-ze DONG,Xuan WANG,Feng-hua LI. Stochastic job stream scheduling method for cipher chip with multi-cryptography[J]. Journal on Communications, 2016, 37(12): 86-94.

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参考文献 23

[1]	王蕾，崔慧敏，陈莉，等．任务并行编程模型研究与进展[J]．软件学报， 2013,24(1):77-90. WANG L , CUI H M , CHEN L , et al. Research on task parallel pro-gramming model[J]. Journal of Software, 2013,24(1):77-90.
[2]	SEOG C S , JUNG H P , DONG H L , et al. An efficient implementation of KCDSA on graphic processing units[C]// 2011 Fifth FTRA International Conference on Multimedia and Ubiquitous Engineering. 2011:167-172.
[3]	QIU C , LU Y Q , GAO P D , et al. A parallel bulk loading algorithm for m-tree on multi-core CPU[C]// 2010 Third International Joint Confer-ence on Computational Science and Optimization. 2010:300-303.
[4]	SATOH A . High-speed parallel hardware architecture for galois counter mode[C]// 2007 IEEE International Symposium on Circuits and Systems. 2007:1863-1866.
[5]	WU F , WANG L , WAN J G . A low cost and inner-round pipelined design of ECB-AES-256 crypto engine for solid state disk[C]// 2010 IEEE Fifth International Conference on Networking, Architecture, and Storage. 2010:485-491.
[6]	LARA P , BORGES F , PORTUGAL R , et al. Parallel modular expo-nentiation using load balancing without precomputation[J]. Journal of Computer ＆ System Sciences, 2012,78(2):575-582.
[7]	AMINI E , JEDDI Z , BAYAYOUMI M . A high-throughput ECC archi-tecture[C]// 2012 19th IEEE International Conference on Electronics, Circuits, and Systems. 2012:901-904.
[8]	MOZAFFARI K M , REYHANI M A . Efficient and high-performance parallel hardware architectures for the AES-GCM[J]. IEEE Transac-tions on Computers, 2012,61(8):1165-1178.
[9]	ZHANG K , HU J Y , HUA B . A holistic approach to build real-time stream processing system with GPU[J]. Journal of Parallel and Dis-tributed Computing, 2015,83:44-57.
[10]	HAYWARD R , CHIANG C C . Parallelizing fully homomorphic encryption[C]// 2014 International Symposium on Computer, Con-sumer and Control. 2014:721-724.
[11]	HAYWARD R , CHIANG C C . An architecture for parallelizing fully homomorphic cryptography on cloud[C]// 2013 Seventh International Conference on Complex, Intelligent, and Software Intensive Systems. 2013:72-77.
[12]	李凤华．分布式信息系统安全的理论与关键技术研究[D]．西安电子科技大学， 2009. LI F H . Theory and key technologies for the security in distributed in-formation systems[D]. Xidian University, 2009.
[13]	HUANG W , HAN J , WANG S A , et al. A low-complexity heteroge-neous multi-core platform for security soc[C]// 2010 IEEE Asian Solid-State Circuits Conference. 2010:1-4.
[14]	LIU Q , XU Z , YUAN Y . High throughput and secure advanced en-cryption standard on field programmable gate array with fine pipelin-ing and enhanced key expansion[J]. IET Computers ＆ Digital Tech-niques, 2015,9(3):175-184.
[15]	WANG M Y , SU C P , HORNG C L , et al. Single- and multi-core configurable AES architectures for flexible security[J]. IEEE Transac-tions on Very Large Scale Integration Systems, 2010,18(4):541-552.
[16]	XIAO L , LI Y , RUAN L , et al. High performance implementation of aria encryption algorithm on graphics processing units[C]// IEEE In-ternational Conference on High Performance Computing ＆ Commu-nications ＆ IEEE International Conference on Embedded ＆ Ubiqui-tous Computing. 2013:504-510.
[17]	方跃坚，沈晴霓，吴中海．一种超椭圆曲线密码处理器并行结构设计[J]．计算机研究与发展， 2013,11:2383-2388. FANG Y J , SHEN Q N , WU Z H . A parallel architecture for FPGA based hyperelliptic curve cryptoprocessor[J]. Journal of Computer Research and Development, 2013,50(11):2383-2388.
[18]	XUAN K D , LOUISE S , COHEN A . Managing the latency of data-dependent tasks in embedded streaming applications[C]// 2015 IEEE 9th International Symposium on Embedded Multi-core/Many-core Systems-on-Chip. 2015:9-16.
[19]	CHEN W , FEKETE K , YOUNG C L . Exploiting deadline flexibility in Grid workflow rescheduling[C]// 2010 11th IEEE/ACM International Conference on Grid Computing. 2010:105-112.
[20]	SPASIC J , LIU D , CANELLA E , et al. Improved hard real-time sched-uling of CSDF-modeled streaming applications[C]// 2015 International Conference on Hardware/Software Codesign and System Synthesis. 2015:65-74.
[21]	BAMAKHRAMA M , STEFANOY T . Hard-real-time scheduling of data-dependent tasks in embedded streaming applications[C]// The Ninth ACM International Conference on Embedded Software. 2011:195-204.
[22]	CLEMENTE J A , RANA V , SCIUTO D , et al. A hybrid map-ping-scheduling technique for dynamically reconfigurable hard-ware[C]// 2011 21st International Conference on Field Programmable Logic and Applications. 2011:177-180.
[23]	JOVANOVIC S , TANOUGAST C , WEBER S . A hardware preemptive multitasking mechanism based on scan-path register structure for FPGA-based reconfigurable systems[C]// Second NASA/ESA Confer-ence on Adaptive Hardware and Systems. 2007:358-364.

\|(x^{^}a)	\|(x^{^}b)	\|(x^{^}c)	y[1:0]	匹配
0	1	1	01	与a匹配
1	0	1	10	与b匹配
1	1	0	11	与c匹配
1	1	1	00	无匹配项

时间序列	作业分组	Pia={taski, cypi, modei, No.}
1	P₁₁	{1,IP₁,CBC,1}
2	P₂₁	{2,IP₂,ECB,1}
3	P₃₁	{3,IP₁,ECB,1}
4	P₁₂	{1,IP₁,CBC,2}
5	P₂₂	{2,IP₂,ECB,2}

密码芯片的多算法随机作业流调度方法

Stochastic job stream scheduling method for cipher chip with multi-cryptography

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