Journal on Communications ›› 2021, Vol. 42 ›› Issue (8): 217-225.doi: 10.11959/j.issn.1000-436x.2021157

• Correspondences • Previous Articles    

Theoretical analysis for the data immigration between memory and processor percolation cache

Jiuchuan HU1, Dongrui FAN2, Jiancong CHENG1, Long YAN2, Xiaochun YE2, Lingzhi LI1, Liangyi WAN1, Haibin ZHONG1   

  1. 1 School of Computer and Information Technology, Beijing Jiaotong University, Beijing 100044, China
    2 Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100080, China
  • Revised:2021-03-26 Online:2021-08-25 Published:2021-08-01
  • Supported by:
    The National Natural Science Foundation of China(61732018)

Abstract:

To improve the computer processor’s memory access efficiency, increase hit rates, reduce data fetching latency, the data and instructors that had close relation with each other could build the just-in-time locality environment on processor’s cache.To build such an environment, the relations between the data and instructors should be studied while them being immigrated into on-chip cache.The research results show that these relations could be well kept when the data and instructors are moved.The simulation also shows that the percolation cache can help the processor core to increase its hit rates.These research results give a new way to build the just-in-time locality environment on the percolation cache.

Key words: data immigration on chip, just-in-time locality, percolation

CLC Number: 

No Suggested Reading articles found!