工业物联网中的缓冲内存管理设计与实现

doi:10.11959/j.issn.2096-3750.2019.00088

Abstract

Abstract:

Aiming at the problem of how to store traffic jam efficiently in high-speed communication of industrial Internet of things,the method of memory management was introduced.On the basis of researching the storage principle of SDRAM,a SDRAM partition memory management system based on field programmable gate array (FPGA) was designed.FPGA was used as the main controller,SDRAM was divided into two parts:index area and data area.In order to facilitate memory management,SDRAM data was further divided into memory blocks with the same size of 1 kB to achieve the purpose of reading and writing data through index.The simulation and experimental results show that the unreliable problems such as data disorder caused by reading multiple data frames from SDRAM after traffic congestion in high-speed communication can be solved effectively,and the stability of communication system can be improved by the memory management system combined with FIFO.

Key words: industrial Internet of things, field programmable gate array, synchronous dynamic random access memory, memory management

CLC Number:

TP393

Chao WU,Chengqun WANG,Shenghong ZHU,Weiqiang XU,Yubo JIA. Design and implementation of buffer memory management in industrial Internet of things[J]. Chinese Journal on Internet of Things, 2019, 3(1): 60-64.

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References 15

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