电信科学 ›› 2009, Vol. 1 ›› Issue (2): 90-95.doi: 10.3969/j.issn.1000-0801.2009.02.022

• 研究与开发 • 上一篇    下一篇

一种应用于多带正交频分复用超宽带的IFFT/FFT处理器

梁华国,覃敏东,欧阳一鸣   

  1. 合肥工业大学 合肥 230009
  • 出版日期:2009-02-15 发布日期:2017-08-18
  • 基金资助:
    国家自然科学基金资助项目;国家自然科学基金资助项目

A FFT/IFFT Processor for MB-OFDM UWB Applications

Huaguo Liang,Mindong Tan,YangYiming Ou   

  1. Hefei University of Technology,Hefei 230009,China
  • Online:2009-02-15 Published:2017-08-18

摘要:

针对多带正交频分复用超宽带(MB-OFDM UWB)系统,提出了一种高吞吐量、混合字长、混合基、4并行数据路径的128点IFFT/FFT处理器结构。该处理器采用具有误差补偿的改进Booth定长乘法器和CSD常量乘法器,有效地提高了精度和减少了硬件的复杂度。通过分析,本方案比混合基多路径延迟反馈(MRMDF)结构减少了49%的乘法器资源,在硬件开销相当的情况下,比双并行数据路径结构减少了30%的存储器资源和提高了33%的吞吐量,使该处理器在精度、硬件开销和速度上做了最好的折衷。在0.18 μm COMS工艺下,该处理器的最大工作频率达到300 MHz,吞吐量为1.2 Gsamples/s,满足了吉比特无线个人域网络(WPAN)的要求。

关键词: 多带正交频分复用, 超宽带, IFFT/FFT, 无线个人域网络

Abstract:

This paper presents a high-throughput,hybrid word-length,mixed-radix,four-parallel data-path 128-point FFT/IFFT processor for MB-OFDM ultrawideband(UWB)systems.The proposed processor uses an error compensation method for modified booth fixed-width multipliers and canonic signed digit(CSD)multipliers,which leads to higher precision and lower hardware complexity.From analysis,it is shown that the proposed architecture can save 49% multipliers utilizations compared to MRMDF architecture,additional our proposed architecture can save 30% memory resource and be increased by 33% throughput rate compared to the two- parallel data-path architecture under the same hardware cost.So it makes the best balance of the precision,the hardware cost and the speed.Also,ours processor is designed using 0.18 μm COMS process with a throughput rate of up to 1.2 Gsample/s at 300 MHz,which meets the requirements for gigabit WPAN.

Key words: MB-OFDM, UWB, IFFT/FFT, WPAN

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