降低系统芯片中跨时钟域设计和验证复杂度的方法
刘丹,冯毅,党向磊,佟冬,程旭,王克义
Method for reducing the complexity of clock domain crossing design and its verification in system-on-chips
Dan LIU,Yi FENG,Xiang-lei DANG,Dong TONG,Xu CHENG,Ke-yi WANG
通信学报
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2012, (11): 151
-158
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DOI: 10.3969/j.issn.1000-436x.2012.11.019
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