Chinese Journal of Network and Information Security ›› 2021, Vol. 7 ›› Issue (2): 64-76.doi: 10.11959/j.issn.2096-109x.2021026

• Topic: Integrated Circuit Hardware Security • Previous Articles     Next Articles

Compact software/hardware co-design and implementation method of Aigis-sig digital signature scheme

Zhen ZHOU1,2, Debiao HE1,2, Min LUO1,2, Li LI1,2   

  1. 1 Key Laboratory of Aerospace Information Security and Trusted Computing, Ministry of Education, Wuhan 430072, China
    2 China School of Cyber Science and Engineering, Wuhan University, Wuhan 430072, China
  • Revised:2021-01-09 Online:2021-04-15 Published:2021-04-01
  • Supported by:
    The National Natural Science Foundation of China(61972294);The National Natural Science Foundation of China(61932016)

Abstract:

Digital signature scheme Aigis-sig, constructed on ideal lattice, takes the advantages of high efficiency, short signature length and resistant to quantum attack, etc.An optimized modular multiplication arithmetic component was constructed and a compact hardware architecture for polynomial operation over a ring based on number theory transformation (NTT) algorithm for Aigis-sig was designed.Besides, based on this architecture, software/hardware co-design and implementation for Aigis-sig scheme on FPGA platform in cryptography was proposed.Experimental results show that the speed of signature phase and verification phase are increased by about 26% and 17% respectively, compared with the pure software implementation on Xilinx Zynq-7000 SoC platform when CPU clock frequency and hardware clock frequency are set as 666.66MHz and 150 MHz respectively.

Key words: post-quantum cryptography, digital signature, Aigis-sig, FPGA, number theory transformation

CLC Number: 

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