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Research on Topologic Architecture of Three-Dimensional Network on Chip

Chen Yiou,Hu Jianhao and Ling Xiang   

  1. National Communication Laboratory, University of Electronic Science and Technology of China;National Communication Laboratory, University of Electronic Science and Technology of China;National Communication Laboratory, University of Electronic Science and Technology of China
  • Online:2009-03-15 Published:2009-03-15

Abstract: The three-dimensional network on chip is a new technology in VLSI, in order to solve the communication challenges of system on chip caused by high integration. The state of the art topologies and relative techniques for 3D NoC are introduced in this area, three novel 3D topologies based on De Bruijn graph are proposed, and the performance parameters of these topologies are compared.

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