认证加密算法SM4-GCM的低成本硬件架构设计与实现

doi:10.11959/j.issn.2096-3750.2023.00362

摘要/Abstract

摘要：

物联网已被广泛应用于各行各业，该项技术的赋能使得行业应用更好地向数字化、智能化方向发展。在一些行业应用中，物联网设备采集的数据与用户隐私和财产安全关系密切。为了保护数据安全，基于国产认证加密算法SM4-GCM（Galois/Counter Mode），提出一种低成本、多功能的硬件架构设计。设计兼顾性能、成本和硬件级的数据机密性和完整性保障，同时也支持3种工作模式：SM4-CTR、SM4-ECB和SM4-GCM。在现场可编程门阵列（FPGA, field programmable gate array）开发板上的实现结果显示，该设计仅需1 761个查找表和1 825个寄存器，占用的资源片仅为604，而吞吐率达到39.78 Mbit/s@100 MHz，能够满足物联网数据安全应用需求。

关键词: 物联网, 数据安全, 认证加密, SM4-GCM, FPGA

Abstract:

The internet of things (IoT) has gained wide adoption across various industries, driving digitalization and intelligence in industry applications.However, the data collected by IoT devices in some industry applications may be closely linked to user privacy and property security.To ensure the security of such data, a cost-effective, multifunctional hardware architecture design based on the Chinese authenticated encryption algorithm SM4-GCM (Galois/Counter Mode) was proposed, which offered a balanced approach to performance, cost, and hardware-level data confidentiality and integrity assurance, and supported three operation modes: SM4-CTR, SM4-ECB, and SM4-GCM.The implementation results on the field programmable gate array (FPGA) development board demonstrate that the design requires only 1 761 look-up tables and 1 825 registers, occupies only 604 slices, and has a throughput rate of 39.78 Mbit/s@100 MHz.These results suggest that the proposed design can effectively meet the requirements of IoT data security applications.

Key words: IoT, data security, authenticated encryption, SM4-GCM, FPGA

中图分类号:

TN918.4

陈锐, 李春强. 认证加密算法SM4-GCM的低成本硬件架构设计与实现[J]. 物联网学报, 2023, 7(4): 168-179.

Rui CHEN, Chunqiang LI. Design and implementation of low-cost hardware architecture for authentication encryption algorithm SM4-GCM[J]. Chinese Journal on Internet of Things, 2023, 7(4): 168-179.

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指标	评估结果
时钟周期	2 574 Cycle
吞吐率	0.397 8 bit/Cycle
	39.78 Mbit/s@100 MHz

指标	占用量/个	占比
Slice LUT	1 761	3.53%
Slice Registers	1 825	1.72%
slice	604	4.54%
Block RAM	0	0
DSP	0	0

文献	领域	实现	面积	吞吐率
[21]	高性能	GPU	—	1.62 Gbit/s
[22]	高性能	ZYNQ 7035 FPGA	12 579 FF +22 856 LUT	28.16 Gbit/s
[23]	高性能	Virtex-5 FPGA	10 609 FF +10 609 LUT	32.1 Gbit/s
本文	低成本	ZYNQ 7020 FPGA	604 slices (1 825 FF +1 761 LUT)	39.78 Mbit/s